Methods and apparatus that use such techniques as vacuum deposition to form semiconductor-based devices of various kinds are well known. Such techniques serve well for many purposes and can achieve high reliability, small size, and relative economy when applied in high volume settings. Recently, other techniques are being explored to yield semiconductor-based devices. For example, organic semiconductor materials (and other semiconductor materials) can be provided as a functional ink and used in conjunction with various printing techniques to yield printed semiconductor devices.
Printed semiconductor devices, however, yield considerably different end results and make use of considerably different fabrication techniques than those skilled in the art of semiconductor manufacture are prone to expect. Other differences exist as well. For example, a present typical printed semiconductor circuit is comprised only of semiconductors having a same carrier type (for example, only p-type transistors) whereas most modem CMOS transistors are comprised of multiple carrier types.
Other related differences become apparent within the context of a specific type of circuit. Consider, for example, a two-transistor inverter circuit. A printed two-transistor inverter circuit is readily formed but typically yields unsatisfactory performance. For example, though many printed p-type transistors are switched “on” with a negative gate bias, a significantly positive gate voltage is in many cases required to completely shut such a device “off.” At zero gate voltage bias, the device is only partially switched “off.” Therefore, if no such accommodation of reversal of gate bias polarity is made, and zero gate bias is used to switch the device “off,” the effective on-off ratio is relatively low. This state of compromised on-off ratio is encountered in the example two-transistor inverter circuit.
As another example, the characteristic transfer curve of such an inverter is typically quite asymmetric (owing, at least in part, to the fact that the inverter will typically be very resistant to variations in input voltage when the output is relatively low but will be very sensitive when the output is high). The resultant low on/off ratio and low operating margins, in turn, can render such an inverter unduly susceptible to operational degradation, system and signal noise, and/or environmental conditions.